Lead Verification Engineer
Job Description
Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Title: Lead Verification Engineer
Location: Montreal, Ottawa, Toronto
Overview
This is an opportunity to join a dynamic and growing team of experienced engineers developing high-performance physical IP for industry-standard protocols.
The successful candidate will be a highly motivated self-starter who can work independently to complete tasks within project timelines with high quality.
The candidate will primarily verify digital RTL and develop reusable verification components and environments.
Responsibilities include all aspects of digital verification: flow development, test plan creation and execution, functional coverage, and code coverage closure.
The candidate should understand the end-to-end verification flow to communicate effectively with all technical team members about project progress.
Ideal candidates will demonstrate strong logic principles, problem-solving, and communication skills.
The candidate should work well in a small team and collaborate with design, verification, project management, and other teams across different locations.
The position requires full-time work in Montreal and some travel (up to 5%).
Design IP is a growing organization within Cadence. More info: .
Minimum Experience:
- BSc in Electrical Engineering, Computer Engineering, or Computer Science
- Understanding of verification architecture and methodologies
- Knowledge of Metric Driven Verification
- Familiarity with Universal Verification Methodologies (UVM)
- Experience with functional coverage and checks creation
- Knowledge of SystemVerilog Assertions (SVAs)
- Understanding of digital design flow
Preferred Experience:
- Master’s degree in EE, CPE, or CSC
- Experience with SystemVerilog UVM coding
- Proficiency with scripting languages like Python, Perl, Ruby, etc.
- Knowledge of protocols like PCIe, USB, SATA, Ethernet, DisplayPort, HDMI
- Experience with Formal Verification
- Exposure to Mixed Signal Design
- Cadence tool experience
- Knowledge of Low Power verification using CPF or UPF
Cadence is an equal-opportunity employer committed to diversity. English proficiency is required due to global interactions.
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Company
Cadence Design Systems
Location
Ottawa
Country
Canada
Salary
100.000
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